/*
 * (C) Copyright 2001	Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Andreas Heppel <aheppel@sysgo.de>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * cpu.c
 *
 * CPU specific code
 *
 * written or collected and sometimes rewritten by
 * Magnus Damm <damm@bitsmart.com>
 *
 * minor modifications by
 * Wolfgang Denk <wd@denx.de>
 *
 * more minor modifications by
 * Andreas Heppel <aheppel@sysgo.de>
 */

#include <ppcboot.h>
#include <mpc75x.h>
#include <asm/cache.h>
#include <config.h>

#if !defined(CONFIG_74x) && !defined(CONFIG_75x) && !defined(CONFIG_74xx)
#error CPU undefined
#endif

int
checkcpu(long clock)
{
	uint pvr = get_pvr(); /* processor version register */

	switch (PVR_VER(pvr)) {
	case 0x0008:
		puts("PPC74x/75x ");
		break;

	case 0x000c:
		puts("PPC7400 ");
		break;

	default:
		puts("Unknown CPU -- configuration error!\n");
		return -1;
		break;
	}
	
	printf("v%d.%d at %ld / %ld MHz\n", (pvr >> 8) & 0xFF, pvr & 0xFF, clock/1000000, get_bus_freq(0)/1000000);
	
	return 0;
}

/* these two functions are unimplemented currently [josh] */

/* ------------------------------------------------------------------------- */
/* L1 i-cache                                                                */

int
checkicache(void)
{
	return 0; /* XXX */
}

/* ------------------------------------------------------------------------- */
/* L1 d-cache                                                                */

int
checkdcache(void)
{
	return 0; /* XXX */
}

/* ------------------------------------------------------------------------- */

/*
 * For the 603 the TB clock runs at 1/4 the cpu bus speed.
 */
unsigned long
get_tbclk (void)
{
	return get_bus_freq(0) / 4;
}

/* ------------------------------------------------------------------------- */

/*
 * The MPC7xx/74xx CPUs do not have an internal watchdog and also do not have
 * any possibility to reset on check stop. If any of those features is to be
 * used, there must be a board specific solution. Thus, the functions do_reset()
 * and watchdog_reset() are not implemented here, but in the board's main file.
 */
 
/*void
do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
}
*/

/* ------------------------------------------------------------------------- */

/*#if defined(CONFIG_WATCHDOG)
void
watchdog_reset(void)
{
}
#endif
*/

/* ------------------------------------------------------------------------- */
