/*
 * (C) Copyright 2000, 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 * David Updegraff, Cray, Inc.  dave@cray.com: our 405 is walnut-lite..
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */
/*
 * board/config.h - configuration options, board specific
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_CRAYL1
/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_405GP		1	/* This is a PPC405 CPU		*/
#define CONFIG_405		1	/* ...member of PPC405 family   */
#define CONFIG_BOARD_PRE_INIT 1 /* setup for 405gp */
#define CONFIG_SYS_CLK_FREQ     25000000 /* .. frequency in L1 */

#define CFG_ENV_IS_IN_FLASH     1	/* use FLASH for environment vars */
#undef CFG_ENV_IS_IN_NVRAM		/* NO!use NVRAM for environment vars */
#define CONFIG_MISC_INIT_R 1	/* call a misc_init when basic setup done, */
								/* in our case, make sure we have ethaddr */



/* Default environment stuff */
#define CONFIG_BAUDRATE		9600
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
#define	CFG_AUTOLOAD		"no"

#define CONFIG_BOOTCOMMAND	"setenv autostart no; "\
							"setenv autoload no; "\
							"dhcp; "\
							"L1cmd update; "\
							"L1cmd boot"

#define CONFIG_MII		1	/* MII PHY management		*/
#define	CONFIG_PHY_ADDR		1	/* PHY address			*/


#define CONFIG_COMMANDS	 (\
	CFG_CMD_BDI|\
	CFG_CMD_IMI|\
	CFG_CMD_FLASH|\
	CFG_CMD_MEMORY|\
	CFG_CMD_NET|\
	CFG_CMD_ENV|\
	CFG_CMD_CONSOLE|\
	CFG_CMD_ASKENV|\
	CFG_CMD_ECHO|\
	CFG_CMD_REGINFO|\
	CFG_CMD_DHCP|\
	CFG_CMD_DATE|\
	CFG_CMD_RUN|\
	CFG_CMD_BSP)

#if LATER_ON
	CFG_CMD_RUN
	CFG_CMD_CACHE
	CFG_CMD_EEPROM
	CFG_CMD_I2C
	CFG_CMD_IMMAP
#endif



/*
 * optional BOOTP fields
 */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_VENDOREX\
 |CONFIG_BOOTP_SUBNETMASK\
 |CONFIG_BOOTP_GATEWAY\
 |CONFIG_BOOTP_DNS\
 |CONFIG_BOOTP_HOSTNAME\
 |CONFIG_BOOTP_BOOTFILESIZE\
 |CONFIG_BOOTP_BOOTPATH)

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

#undef CONFIG_WATCHDOG			/* watchdog disabled		*/

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP			/* undef to save memory		*/
#define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
#else
#define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS	16		/* max number of command args	*/
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/


#undef  CFG_EXT_SERIAL_CLOCK           /* no external serial clock used */
#define CFG_BASE_BAUD       691200

/* The following table includes the supported baudrates */
#define CFG_BAUDRATE_TABLE      \
        { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
         57600, 115200, 230400, 460800, 921600 }

#define CFG_CLKS_IN_HZ	1		/* everything, incl board info, in Hz */

#define CFG_LOAD_ADDR		0x100000	/* default load address */
#define CFG_EXTBDINFO		1	/* To use extended board_into (bd_t) */

#define	CFG_HZ		1000		/* decrementer freq: 1 ms ticks	*/

/*-----------------------------------------------------------------------
 * PCI stuff
 *-----------------------------------------------------------------------
 */
#undef CONFIG_PCI			/* DO NOT include pci support	        */

/*-----------------------------------------------------------------------
 * External peripheral base address
 *-----------------------------------------------------------------------
 */
#undef  CONFIG_IDE_8xx_DIRECT               /* no pcmcia interface required */
#undef  CONFIG_IDE_LED                  /* no led for ide supported     */
#undef  CONFIG_IDE_RESET                /* no reset for ide supported   */

#undef	CFG_KEY_REG_BASE_ADDR			/* NO! peripherals... */
#undef	CFG_IR_REG_BASE_ADDR
#undef	CFG_FPGA_REG_BASE_ADDR

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
#define CFG_SDRAM_BASE		0x00000000
#define CFG_FLASH_BASE		0xFFC00000
#define CFG_MONITOR_BASE	0xFFFE0040

#define CFG_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/
#define CFG_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
 * FLASH organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
#define CFG_MAX_FLASH_SECT	64	/* max number of sectors on one chip	*/

#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/

/* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector  */
#define CFG_ENV_OFFSET		0x003D0000 /* Offset of Environment Sector  */
#define	CFG_ENV_SIZE		0x10000	/* Total Size of Environment Sector	*/
#define CFG_ENV_SECT_SIZE	0x10000	/* see README - env sector total size	*/

/* Memory tests: PPCBOOT relocates itself to the top of Ram, so its at
 * 32meg-(128k+some_malloc_space+copy-of-ENV sector).. 
 */
#if 0
#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
#else


#define CFG_SDRAM_SIZE		32			/* megs of ram */
#define CFG_MEMTEST_START       0x2000  /* memtest works from the end of */
                                        /* the exception vector table */
                                        /* to the end of the DRAM  */
                                        /* less monitor and malloc area */
#define CFG_STACK_USAGE         0x10000 /* Reserve 64k for the stack usage */
#define CFG_MEM_END_USAGE       ( CFG_MONITOR_LEN \
                                + CFG_MALLOC_LEN \
                                + CFG_ENV_SECT_SIZE \
                                + CFG_STACK_USAGE )

#define CFG_MEMTEST_END         ( CFG_SDRAM_SIZE * 1024 * 1024 \
                                - CFG_MEM_END_USAGE )
#endif
/* END ENVIRONNEMENT FLASH */
/*-----------------------------------------------------------------------
 * NVRAM organization
 */
#undef CFG_NVRAM_BASE_ADDR

/*-----------------------------------------------------------------------
 * Cache Configuration
 */
#define CFG_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/
#endif

/*
 * Init Memory Controller:
 *
 * BR0/1 and OR0/1 (FLASH)
 */

#define FLASH_BASE0_PRELIM	CFG_FLASH_BASE	/* FLASH bank #0	*/
#define FLASH_BASE1_PRELIM	0		/* FLASH bank #1	*/


/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in DPRAM)
 */
#define CFG_INIT_RAM_ADDR	0x00df0000  /* inside of SDRAM                     */
#define CFG_INIT_RAM_END	0x0f00	/* End of used area in RAM	       */
#define CFG_INIT_DATA_SIZE	64  /* size in bytes reserved for initial data */
#define CFG_INIT_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_INIT_DATA_SIZE)
#define CFG_INIT_SP_OFFSET	CFG_INIT_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Definitions for Serial Presence Detect EEPROM address
 * (to get SDRAM settings) 
 * DBU: we may yet use these someday..
 */
#define EEPROM_WRITE_ADDRESS 0xA0
#define EEPROM_READ_ADDRESS  0xA1

/*
 * Internal Definitions
 *
 * Boot Flags
 */
#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
#define BOOTFLAG_WARM	0x02		/* Software reboot			*/

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
#endif
#endif	/* __CONFIG_H */
