/*
 * (C) Copyright 2002
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <config.h>
#include <ppcboot.h>
#include <command.h>
#include <asm/io.h>
#include <linux/mtd/doc2000.h>

#include "pci.h"

#include "hardware.h"
#include "pcippc2.h"
#include "sconsole.h"
#include "fpga_serial.h"

  /* Check board identity
   */
int checkboard (void)
{
  printf("PCIPPC-2\n");

  return 1;
}

  /* RAM size is stored in CPC0_RGBAN1
   */
u32 pcippc2_sdram_size (void)
{
  return in32(REG(CPC0, RGBAN1));
}

long initdram (
  int			board_type)
{
  return cpc710_ram_init();
}

void do_reset (
  cmd_tbl_t *		cmdtp,
  bd_t *		bd,
  int 			flag,
  int 			argc,
  char *		argv [])
{
  out32(REG(CPC0, SPOR), 0);
  iobarrier_rw();
  while (1);
}

int board_pre_init (void)
{
  out32(REG(CPC0, RSTR), 0xc0000000);
  iobarrier_rw();

  out32(REG(CPC0, RSTR), 0xf0000000);
  iobarrier_rw();

  out32(REG(CPC0, UCTL), 0x00f80000);

  out32(REG(CPC0, SIOC0), 0x30000000);

  out32(REG(CPC0, ABCNTL), 0xb0000000);

  out32(REG(CPC0, SESR), 0x00000000);
  out32(REG(CPC0, SEAR), 0x00000000);

  out32(REG(CPC0, PGCHP), 0x80800040);

  out32(REG(CPC0, ATAS), 0x709c2508);

  iobarrier_rw();
  
  return 0;
}

void after_reloc (
  bd_t *		bd,
  ulong			dest_addr)
{
    /* Jump to the main ppcboot board init code
     */
  board_init_r(bd, dest_addr);
}

void misc_init_r (
  bd_t *		bd)
{
  pcippc2_fpga_init();
  
  fpga_serial_init(sconsole_get_baudrate());

  sconsole_putc   = fpga_serial_putc;
  sconsole_puts   = fpga_serial_puts;
  sconsole_getc   = fpga_serial_getc;
  sconsole_tstc   = fpga_serial_tstc;
  sconsole_setbrg = fpga_serial_setbrg;
  
  sconsole_flush();
}

void pci_init (
  bd_t * 		bd)
{
  cpc710_pci_init();

#ifdef CONFIG_PCI_PNP
  PCI_Scan(0);
#endif

    /* FPGA requires no retry timeouts to be enabled
     */
  cpc710_pci_enable_timeout();
}

void doc_init (void)
{
  doc_probe(pcippc2_fpga1_phys + HW_FPGA1_DOC);
}
