/*
 * (C) Copyright 2001
 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <ppcboot.h>
#include "w7o.h"
#include <asm/processor.h>
#include "error.h"


/* ------------------------------------------------------------------------- */

extern int init_fpga(void);

int board_pre_init (void)
{
#if defined(CONFIG_W7OLMG)
  /*
   * Setup GPIO pins - reset devices.
   */
  out32(IBM405GP_GPIO0_ODR, 0x10000000);  /* one open drain pin */
  out32(IBM405GP_GPIO0_OR, 0x3E000000);   /* set output pins to default */
  out32(IBM405GP_GPIO0_TCR, 0x7f800000);  /* setup for output */

  /*
   * IRQ 0-15  405GP internally generated; active high; level sensitive
   * IRQ 16    405GP internally generated; active low; level sensitive
   * IRQ 17-24 RESERVED
   * IRQ 25 (EXT IRQ 0) XILINX; active low; level sensitive
   * IRQ 26 (EXT IRQ 1) PCI INT A; active low; level sensitive
   * IRQ 27 (EXT IRQ 2) PCI INT B; active low; level sensitive
   * IRQ 28 (EXT IRQ 3) SAM 2; active low; level sensitive
   * IRQ 29 (EXT IRQ 4) Battery Bad; active low; level sensitive
   * IRQ 30 (EXT IRQ 5) Level One PHY; active low; level sensitive
   * IRQ 31 (EXT IRQ 6) SAM 1; active high; level sensitive
   */
  mtdcr(uicsr, 0xFFFFFFFF);        /* clear all ints */
  mtdcr(uicer, 0x00000000);        /* disable all ints */
  mtdcr(uiccr, 0x00000000);        /* set all to be non-critical*/
  mtdcr(uicpr, 0xFFFFFF80);        /* set int polarities */
  mtdcr(uictr, 0x10000000);        /* set int trigger levels */
  mtdcr(uicvcr, 0x00000001);       /* set vect base=0,INT0 highest priority*/
  mtdcr(uicsr, 0xFFFFFFFF);        /* clear all ints */

#elif defined(CONFIG_W7OLMC)
  /*
   * Setup GPIO pins
   */
  out32(IBM405GP_GPIO0_ODR, 0x01800000);  /* XCV Done Open Drain */
  out32(IBM405GP_GPIO0_OR,  0x01800000);  /* set output pins to default */
  out32(IBM405GP_GPIO0_TCR, 0x66C00000);  /* setup for output */

  /*
   * IRQ 0-15  405GP internally generated; active high; level sensitive
   * IRQ 16    405GP internally generated; active low; level sensitive
   * IRQ 17-24 RESERVED
   * IRQ 25 (EXT IRQ 0) DBE 0; active low; level sensitive
   * IRQ 26 (EXT IRQ 1) DBE 1; active low; level sensitive
   * IRQ 27 (EXT IRQ 2) DBE 2; active low; level sensitive
   * IRQ 28 (EXT IRQ 3) DBE Common; active low; level sensitive
   * IRQ 29 (EXT IRQ 4) PCI; active low; level sensitive
   * IRQ 30 (EXT IRQ 5) RCMM Reset; active low; level sensitive
   * IRQ 31 (EXT IRQ 6) PHY; active high; level sensitive
   */
  mtdcr(uicsr, 0xFFFFFFFF);        /* clear all ints */
  mtdcr(uicer, 0x00000000);        /* disable all ints */
  mtdcr(uiccr, 0x00000000);        /* set all to be non-critical*/
  mtdcr(uicpr, 0xFFFFFF80);        /* set int polarities */
  mtdcr(uictr, 0x10000000);        /* set int trigger levels */
  mtdcr(uicvcr, 0x00000001);       /* set vect base=0,INT0 highest priority*/
  mtdcr(uicsr, 0xFFFFFFFF);        /* clear all ints */
  
#else /* Unknown */
#  error "Unknown W7O board configuration"
#endif

  return 0;
}


/* ------------------------------------------------------------------------- */

/*
 * Check Board Identity:
 */

int checkboard (void)
{
    unsigned char *s = getenv("serial#");
    unsigned char *e;
#if 0
    int i;
    int index;
    int len;
#endif

    if (!s || strncmp(s, "LMC", 3) || strncmp(s, "LMG", 3))
      {
	printf ("### No HW ID - assuming NOTHING\n");
      }
    else
      {
        for (e=s; *e; ++e) {
          if (*e == ' ')
	    break;
        }

        for ( ; s<e; ++s) {
          putc (*s);
        }
      }
#if 0
    printf("\n  FPGA:  ");
    
    /* display infos on fpgaimage */
    index = 15;
    for (i=0; i<4; i++)
      {
        len = fpgadata[index];
        printf("%s ", &(fpgadata[index+1]));
        index += len+3;
      }
    
    putc ('\n');
#endif
    return (0);
}

/* ------------------------------------------------------------------------- */

long int initdram (int board_type)
{
  return (64 * 1024*1024);
}

/* ------------------------------------------------------------------------- */

int testdram (void)
{
    /* TODO: XXX XXX XXX */
    printf ("test: 64 MB - ok\n");

    return (0);
}

/* ------------------------------------------------------------------------- */

int
misc_init_f(void)
{
    return 0;
}

void
misc_init_r(bd_t *bd)
{
#if defined(CONFIG_W7OLMG)
    unsigned long greg;                    /* GPIO Register */

    greg = in32(IBM405GP_GPIO0_OR);


    /* XXX - Unreset devices - this should be moved into VxWorks driver code */
    greg |= 0x41800000L;                     /* SAM, PHY, Galileo */

    out32(IBM405GP_GPIO0_OR, greg);          /* set output pins to default */
#endif /* CONFIG_W7OLMG */

    init_fpga();

    log_stat(ERR_POSTOK);                    /* Okley, dokley */
    
    return;
}
